Cadence PCB Best Practices

Constraint Compiler User Guide

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Allegro Constraint Compiler User Guide Allegro Constraint Compiler October 2019 15 Product Version 17.4-2019 © 1999-2019 All Rights Reserved. Tables Types The Object and Specification tables contain agnostic constraint information for common design circuity and the Mapping table associates the agnostic constraints to design specific objects. The compiler reads and combines all this constraint data to fully define the constraint requirements for a design. ■ Mapping Name Table ■ Global Mapping Table ■ Object table ■ Rule Specification Table ■ Object Rule Specification Table Mapping Name Table Mapping table associates the design specific name to a string alias that is defined in other tables. For example, Part (Component), Net or "*" (all object types). The compiler reads this table to map alias place holders referenced in the data tables to be replaced with design specific names. The mapping name table provides a central location to remap all the aliases to the design specific names. Header Rows Specify data type or constraint type information. Header rows are specified between Table Keys and Data Rows. The name of column header with semicolon separators could span two rows. For example, Prop Delay: Min shown as Prop Delay in first row and Min in second row Data Rows Specify constraint values and requirements. Data rows are specified between Header Rows and the End statement. Comment Rows (;) Communicates design intent. Note rows (#) Adds notification to compiler report.

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