Cadence PCB Best Practices

Working with Backdrilling

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Working with Backdrilling in Allegro PCB Designer: Best Practices Learn more at Cadence Online Support https://support.cadence.com © 2014 Cadence Design Systems, Inc. All rights reserved worldwide. Page 43 Board Testability The decision to backdrill might impact your in-circuit test strategy. Any pin or via tagged as a test point will not be backdrilled from that side. This might cause a significant reduction in the test coverage because most test points are placed on the pin and via objects. Take advantage of adding test points directly on the outer layer traces where it is feasible to do so. Tool Tip – Automatic and manual test point generation are backdrill aware. Hence, there is no chance of marking a pad as a test point, which will be backdrilled during fabrication. Pins marked as Test Points (Triangle Figures)

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