Issue link: https://resources.pcb.cadence.com/i/1180264
Working with Backdrilling Backdrilling October 2019 12 Product Version 17.4-2019 © 1999-2020 All Rights Reserved. Applying the BACKDRILL_MAX_PTH_STUB property to pins and vias act as an override to the property value added to the associated net. Note: The BACKDRILL_MAX_PTH_STUB property applied to pins and vias is ignored by the backdrill process if their associated net does not have the BACKDRILL_MAX_PTH_STUB property. Stub Calculation A stub is calculated from either the top or bottom side of the board to the adjacent dielectric layer of where the trace enters the PTH. It is a prerequisite that all information pertaining to conductor and dielectric thickness are to be entered in the Cross-section form to perform stub analysis. The following example illustrates how a stub is calculated in Allegro PCB Designer. A trace enters a pin on LAYER_5 and exits on LAYER_6, resulting in a stub from both the top and bottom side. The top side stub includes the conductor and dielectric thickness from layer TOP to the surface of layer LAYER_5. The bottom side stub includes the conductor and dielectric thickness from layer BOTTOM to the surface of layer LAYER_6. Each side-based stub, not the accumulated total, is compared individually against the BACKDRILL_MAX_PTH_STUB property value.