Allegro System Capture App Notes

Design Rule Checks

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Design Rule Checks in Allegro System Capture Learn more at Cadence Support Portal - https://support.cadence.com © 2019 Cadence Design Systems, Inc. All rights reserved w orldw ide. Page 9 DRC Sample to Determine Component Pin Overlaps # ************************************************************** # Rule: To check if any component pin overlaps and if there is a pin-to-pin connection # between any two components. # 1. Function gets the component pins from the canvas and creates a list of component pins. # 2. Gets all the zero length segments from the canvas and creates a list containing the segments. # 3. Iterates over all the component pins and for each pin calculates bounding box. # ******************************************** ****************** proc asda_pins_overlap {designName msgType} { set compPinInsts [asda_get_all_comppins] set zerolengthSegments [asda_get_zerolength_segments] set overlapped_insts {} set count 0 foreach item $compPinInsts { set item_bbox [sch::dbGetBBox $item] set count [incr count] set insts_to_visit [lrange $compPinInsts $count end] foreach item1 $insts_to_visit { set item1_bbox [sch::dbGetBBox $item1] if {[asda_checkbbox_intersection $item_bbox $item1_bbox]} { foreach segment $zerolengthSegments { if { [asda_segment_pt_in_bbox $segment $item_bbox ]} { lappend overlapped_insts $item } } } } } set msgInfo [asda_get_drc_msg_info [lindex [info level [info level]] 0]] set msgId [ lindex $msgInfo 0 ] set message [ lindex $msgInfo 1 ] asda_report_drc $designName $msgType $msgId $message $overlapped_insts return [llength $overlapped_insts] }

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